Fpga Silicon Validation Engineer visa sponsorship salary
Across 2 certified work-visa filings, the median wage for Fpga Silicon Validation Engineer is $146,509. The middle half of filings fall between $143,815 and $149,202, and the top decile begins at $150,818. Classified under SOC 17-2072.00 (Electronics Engineers, Except Computer).
Median
$146,509
25th pct
$143,815
75th pct
$149,202
90th pct
$150,818
Filings
2
$141,122$151,895
Who pays what for Fpga Silicon Validation Engineer
Ranked by number of certified filings
| Employer | Filings | 25th | Median | 75th |
|---|---|---|---|---|
| Altera Corporation | 2 | $143,815 | $146,509 | $149,202 |
Individual filings
Most recent certified determinations
| Employer | Location | Wage | Level | Decided |
|---|---|---|---|---|
| Altera Corporation | San Jose, CA | $141,122 | — | Jun 17, 2025 |
| Altera Corporation | San Jose, CA | $151,895 | — | Jun 11, 2025 |
Prevailing wage levels I through IV reflect the experience and responsibility the employer attested to, not seniority titles. A level I filing is an entry-level determination; level IV is fully competent and independent. Comparing across levels explains much of the spread between the 25th and 90th percentile above.