Fpga Silicon Validation Engineer salary at Altera Corporation
Based on 2 certified work-visa filings, the median filed wage is $146,509. That is 0% above the $146,509 median across all employers filing this title.
Median
$146,509
25th pct
$143,815
75th pct
$149,202
90th pct
$150,818
Filings
2
$141,122$151,895
Individual filings
Certified determinations for this role
| Location | Wage | Prevailing | Level | Visa | Decided |
|---|---|---|---|---|---|
| San Jose, CA | $141,122 | $141,122 | — | H-1B | Jun 17, 2025 |
| San Jose, CA | $151,895 | $151,895 | — | H-1B | Jun 11, 2025 |
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Fpga Silicon Validation Engineer across all employers →
Market rate for this role
Figures are base salary as filed with the US Department of Labor and exclude bonus and equity. SponsorWage does not provide immigration advice.