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Design Verification Principal Engineer salary at Marvell Semiconductor, Inc.

Based on 7 certified work-visa filings, the median filed wage is $205,000. That is 0% above the $205,000 median across all employers filing this title.

Median
$205,000
25th pct
$183,500
75th pct
$205,000
90th pct
$209,800
Filings
7

Individual filings

Certified determinations for this role

Certified Design Verification Principal Engineer filings at Marvell Semiconductor, Inc.
LocationWagePrevailingLevelVisaDecided
Austin, TX$162,000$161,179IVH-1BAug 19, 2025
Santa Clara, CA$217,000$216,091IVH-1BAug 8, 2025
Santa Clara, CA$205,000$204,901IVH-1BFeb 18, 2025
Santa Clara, CA$205,000$204,901IVH-1BJan 24, 2025
Santa Clara, CA$205,000$204,901IVH-1BDec 2, 2024
Santa Clara, CA$205,000$204,901IVH-1BOct 15, 2024
Westborough, MA$137,000$117,000IVH-1BOct 4, 2024
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Market rate for this role

Figures are base salary as filed with the US Department of Labor and exclude bonus and equity. SponsorWage does not provide immigration advice.

Design Verification Principal Engineer Salary at Marvell Semiconductor, Inc. — $205,000 median | SponsorWage