Senior Asic/fpga Design Engineer visa sponsorship salary
Across 1 certified work-visa filings, the median wage for Senior Asic/fpga Design Engineer is $166,920. The middle half of filings fall between $166,920 and $166,920, and the top decile begins at $166,920. Classified under SOC 17-2071.00 (Electrical Engineers).
Median
$166,920
25th pct
$166,920
75th pct
$166,920
90th pct
$166,920
Filings
1
Individual filings
Most recent certified determinations
| Employer | Location | Wage | Level | Decided |
|---|---|---|---|---|
| Scaleflux, INC. | Milpitas, CA | $166,920 | II | May 20, 2025 |
Prevailing wage levels I through IV reflect the experience and responsibility the employer attested to, not seniority titles. A level I filing is an entry-level determination; level IV is fully competent and independent. Comparing across levels explains much of the spread between the 25th and 90th percentile above.